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GENERATING CCS PROJECT FILES USING BIRICHA'S AUTOMATED SCRIPT ​


This document describes how to create the necessary project files for CCS. The script creates two files: .cproject and .project. These files will contain the correct paths to the relevant controlSUITE header files and (optional) Biricha Chip Support Library (CSL) / Digital Power Library (DPWR) for the device that is being used.

Please see BAN106 for a step-by-step CCS installation guide and how to set up a project manually to use Biricha's CSL and DPWR libraries.

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Biricha Digital Power Ltd
Biricha Digital Power Ltd 
9251 Yonge Street, Suite 206, Richmond Hill, L4C 9T3,
Ontario, Canada
  • Home
  • Workshops
  • Clients
  • Technical Videos
  • Articles
  • Design Software
    • ST WDS - Power Supply Design Tool for STM32
    • Biricha WDS - Power Supply Design Tool
    • ST PLD - PFC Loop Design Tool for STM32
    • Biricha PLD - PFC Loop Designer
    • STM32 Discovery Kit
  • More
    • Transformer Measurement
    • Snubber Design
    • RCD Design
    • STM32 Digital Power
    • Tools & Downloads
    • Consultancy
    • Contact Us
    • Terms and Policies
    • Update Preferences
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