ST PLD - PFC Loop Design Tool for STM32 from Biricha |
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Overview
Biricha has teamed up with STMicroelectronics to provide a special release of "PLD - PFC Loop Design Tool" for use with the STM32 range of MCUs from STMicroelectronics. This ST PLD design tool is free-to-use and allows the user to quickly stabilize their digital PFC stage controlled using an STM32 MCU.
The user simply enters their specification into ST PLD. The software will then automatically select the compensator poles and zeros and then calculate the controller coefficients while keeping you in control at every stage of the process.
ST PLD has been created for engineers who need to design digital PFC stages:
- - Automatically calculates poles and zeros as well as power stage components for Boost PFC stage.
- - Sophisticated control algorithms stabilise digital power supplies with automatic coefficient calculations for STM32 range of MCUs
Licensing
ST PLD from Biricha is a free tool for all customers using STM32 products from STMicroelectronics. To download ST PLD, click the "Download Now" button below and fill out the simple registration form. You will need to confirm your email address in order to obtain the download link and receive your free activation code. For full terms and conditions, please see our terms page.
ST PLD is a free to use version of our PFC Loop Design Tool, PLD. Both tools are similar, however ST PLD caters for the design of digital power supplies using STM32. If you would like to design analog PFC stages please visit our Biricha PLD - PFC Loop Designer page for the full version.
TEST TEST Download Now
ST PLD is free to use, however, you will need to fill in a simple registration form below. Once complete you will receive a link to download ST PLD and also a unique code to activate all of the features. ST PLD can be used in a trial mode without a license code. Obtaining a license code is free of charge.
Application Notes using ST PLD
Coming soon.
Using ST PLD for your design
In these short videos we will show you how to use ST PLD to design and stabilize your digital PFC stage.